1. Field of the Invention
The present invention relates to a method for driving a liquid crystal display, and more particularly to a method for driving a liquid crystal display, in which the response speed of a liquid crystal is improved by the change of gate pulse voltage in an Active Matrix Liquid Crystal Display (hereinafter referred to AM-LCD).
2. Description of the Prior Art
As generally known in the art, an AM-LCD is an OA (Office Automation) based product for notebooks or monitors developed for word processing or CAD (Computer-aided design) designing on a freeze frame. Recently, with the development of display devices and an increase of requirements for multimedia environment, a clear moving picture has been required in AM-LCD adapted notebooks and monitors, etc. Also, as a digital broadcast becomes widely spread, the demand for AV (Audiovisual) LCD products has been on the rise.
However, an AM-LCD in the prior art adapts a hold-type driving method for holding displayed data signals for only one field (frame), causing a problem in that a moving picture can not be displayed naturally, unlike an impulsive type CRT (Cathode-ray tube).
For instance, in a case where an AM-LCD is driven at 60 Hz, signals are held for 1/60 second so that, even an liquid crystal with so rapid response speed is used, the signal level is held every 1/60 second, thus transmitting a moving picture which appears choppy.
FIG. 1 is a timing diagram of the conventional AM-LCD according to its driving.
Referring to FIG. 1, in the driving method of the conventional AM-LCD, vertical start signals STV are enabled in 1 vertical period 1V (1V corresponds 16.7 ms when driven at 60 Hz), are synchronized with a transition of vertical clock signal CPV, generating gate pulse voltage, i.e., gate high pulse voltage Vgh and gate low pulse voltage Vgl, thus sequentially scanning the plural gate lines. Herein, V_syn which is not described above represents a vertical synchronous signal, and G1˜G768 represent drive signals sequentially applied to from 1st gate line to 768th gate line.
FIGS. 2A and 2B are waveform diagrams showing properties of pixel charge/discharge of the conventional AM-LCD, which show pixel charge/discharge properties in a positive field and a negative field, respectively.
Referring to FIG. 2A, in the positive field, while gate high pulse voltage Vgh is outputted at a gate drive IC, TFT channels are opened, electric charges supplied through the data lines are introduced into the pixels, charging the corresponding pixels (1H period). Herein, the period on which electric charges are introduced is called a charge period.
Meanwhile, at the gate drive IC, while gate low pulse voltage Vgl is outputted, TFT channels are closed, and applied pixel voltage is reduced by kickback voltage Vp(+), being maintained at a constant level relatively higher than the common voltage Vcom (1V–1H period). Herein, the period over which electric charges are held is called a holding period.
Referring to FIG. 2B, in the negative field, while gate high pulse voltage Vgh is outputted, TFT channels are opened, electric charges flow into the date lines, and the corresponding pixels are discharged. Herein, the period over which electric charges flow is called a discharge period.
Meanwhile, at the gate drive IC, while gate low pulse voltage Vgl is outputted, TFT channels are closed, pixel voltage applied is reduced by kickback voltage Vp(−), maintaining at constant level relatively lower than the common voltage Vcom (1V–1H period). Herein, the period over which electric charges are held at a constant level by discharge of electric charges is a holding period.
The conventional driving method of AM-LCD has a drawback in that operational features of an LCD are mainly generated in the holding period among the periods of charge, discharge and holding so that, since the holding period is held for 1V, a stepping phenomenon is generated when providing moving picture, which makes it difficult to reproduce a smooth moving picture.
Also, the driving method of the conventional AM-LCD holds the holding period of gate pulse voltage for up to the next 1 vertical period after generation of gate pulse voltage, which causes a blurring phenomenon that profiles of picture images are blurred. It has been known that this blurring phenomenon is generated when response time of the liquid crystal is long.